Copper pillar process is making copper-tin bumps on the surface of the chip for "point-of-connection" between the chips or the chips and the substrates by utilizing gluing, litho, electroplating and etching process and other production technology through the surface of the chip in the production of copper and tin bumps after wafer processing of the substrate circuit. The array of bumps on the die surface allows pin density to be higher due to the elimination of the traditional "wire bonding" to the surrounding metal, reducing the area of the chip to meet the performance requirements of the chip, low resistance, low parasitic capacitance, low inductance, low power consumption, low signal-to-noise ratio, low cost, and so on.
|Cu-Pillar Structure||PI Thickness||Standard Cu-Pillar||Micro Cu-Pillar|
65um Cu+35um Sn
25um Cu+20um Sn